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| a FEATURES Flexible Configuration Two Low Noise Voltage Feedback Amplifiers with High Current Drive, Ideal for ADSL Receivers or Drivers for Low Impedance Loads such as CRT Coils Two High Current Drive Amplifiers, Ideal for an ADSL Differential Driver or Single Ended Drivers for Low Impedance Loads such as CRT Coils Thermal Overload Protection CURRENT FEEDBACK AMPLIFIERS/DRIVERS High Output Drive 26 dBm Differential Line Drive for ADSL Transmitters 40 V p-p Differential Output Voltage, RL = 50 @ 1 MHz 500 mA Continuous Current, R L = 5 1 A Peak Current, 1% Duty Cycle, RL = 15 for DMT Low Distortion -68 dB @ 1 MHz THD, RL = 100 , V O = 40 V p-p High Speed 120 MHz Bandwidth (-3 dB) 1500 V/ s Differential Slew Rate, VO = 10 V p-p, G = +5 70 ns Settling Time to 0.1% VOLTAGE FEEDBACK AMPLIFIERS/RECEIVERS High Input Performance 4 nV/Hz Voltage Noise 15 mV Max Input Offset Voltage Low Distortion -68 dB @ 1 MHz THD, VO = 10 V p-p, RL = 200 High Speed 100 MHz Bandwidth (-3 dB) 180 V/ s Slew Rate High Output Drive 70 mA Output Current Drive APPLICATIONS ADSL, VDSL and HDSL Line Interface Driver and Receiver CRT Convergence and Astigmatism Adjustment Coil and Transformer Drivers Composite Audio Amplifiers PRODUCT DESCRIPTION 500 mA Differential Driver and Dual Low Noise (VF) Amplifiers AD816* FUNCTIONAL BLOCK DIAGRAM RECEIVER B 15 14 13 12 11 B 10 9 +VS 8 -VS 7 6 5 4 3 2 1 NC OUT2 RECEIVER -IN2 RECEIVER +IN2 RECEIVER +IN2 DRIVER -IN2 DRIVER OUT2 DRIVER +VS -VS OUT1 DRIVER -IN1 DRIVER +IN1 DRIVER +IN1 RECEIVER -IN1 RECEIVER OUT1 RECEIVER TAB IS +VS DRIVER A & B AD816 A RECEIVER A NC = NO CONNECT The two high output drive amplifiers are capable of supplying a minimum of 500 mA continuous output current and up to 1A peak output current, and when configured differentially, 40 V p-p differential output swing can be achieved on 15 V supplies into a load of 50 . The drivers have 120 MHz of bandwidth and 1,500 V/s of differential slew rate while featuring total harmonic distortion of -68 dB at 1 MHz into a 100 load, specifications required for high frequency telecommunication subscriber line drivers. The low noise voltage feedback amplifiers are fully independent and can be configured differentially for use as receiver amplifiers within a subscriber line hybrid interface or individually for signal conditioning or filtering. The low noise of 4 nV/Hz and distortion of -68 dB at 1 MHz enable low level signals to be resolved and amplified in the presence of large common-mode voltages. 100 MHz of bandwidth and 180 V/s of slew rate combined with a load drive capability of 70 mA enable these amplifiers to drive passive filters and low inductance coils. The AD816 has thermal overload protection for system reliability and is available in low thermal resistance power packages. The AD816 operates over the industrial temperature range (-40C to +85C). The AD816 consists of two high current drive and two low noise amplifiers. These can be configured differentially for driving low impedance loads and receiving signals over twisted pair cable or could be used independently for single ended driving application such as correction circuits within high resolution CRT Monitors. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999 AD816-SPECIFICATIONS DRIVER AMPLIFIERS (@ T = +25 C, V = A S 15 V dc, RF = 1 k and RLOAD = 50 unless otherwise noted) VS 15 5 15 15 15 15 5, 15 5, 15 5, 15 15 15 5 15 Min AD816A Typ Max Units Model DYNAMIC PERFORMANCE Small Signal Bandwidth (-3 dB) Conditions G = +2, RF = 499 , VIN = 0.125 V rms, RL = 100 G = +2, RF = 499 , VIN = 0.125 V rms, RL = 100 G = +2, RF = 499 , VIN = 0.125 V rms, RL = 100 VOUT = 10 V p-p, G = +5, RL = 100 10 V Step, G = +2 f = 1 MHz, RLOAD = 100 , VOUT = 40 V p-p f = 10 kHz, G = +2 (Single Ended) f = 10 kHz, G = +2 f = 10 kHz, G = +2 NTSC, G = +2, RLOAD = 25 NTSC, G = +2, RLOAD = 25 100 90 120 110 10 1500 70 -68 1.85 1.8 19 0.05 0.45 5 10 40 0.5 5 20 2 10 12 15 25 2 5 60 100 5 5 50 50 MHz MHz MHz V/s ns dBc nV/Hz pA/Hz pA/Hz % Degrees mV mV mV V/C mV mV V/C A A A A A A M M M pF V V dB dB V p-p V p-p V p-p V p-p mA mA A A Bandwidth (0.1 dB) Differential Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion (Differential) Input Voltage Noise Input Current Noise (+I IN) Input Current Noise (-I IN) Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage 1400 TMIN to TMAX Input Offset Voltage Drift Differential Offset Voltage TMIN to TMAX Differential Offset Voltage Drift -Input Bias Current TMIN to TMAX +Input Bias Current TMIN to TMAX Differential Input Bias Current Open-Loop Transresistance INPUT CHARACTERISTICS Differential Input Resistance Differential Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio Differential Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Voltage Swing TMIN to TMAX TMIN to TMAX Single Ended, R LOAD = 25 Differential, R LOAD = 50 TMIN to TMAX RLOAD = 5 10 s Pulse, 1% Duty Cycle, RL = 15 Note 1 TMIN to TMAX VOUT = 10 V, RL = 1 k TMIN to TMAX +Input -Input 5, 15 5, 15 5, 15 5, 15 15 15 15 5 5, 15 5, 15 15 5 15 15 15 5 15 15 0.7 0.6 5, 15 2 56 80 23 2.2 46 45 500 200 7 15 1.4 13.5 3.5 60 100 24.5 3.6 49 750 100 1.0 1.0 Continuous Output Current Peak Output Current Short Circuit Current NOTES 1 See Power Considerations section. Specifications subject to change without notice. -2- REV. B AD816 RECEIVER AMPLIFIERS (@ T = +25 C, V A S = 15 V dc, RF = 1 k and RLOAD = 500 VS unless otherwise noted) Min AD816A Typ Max Units Model Conditions DYNAMIC PERFORMANCE Small Signal Bandwidth (-3 dB) Bandwidth (0.1 dB) Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage G = +2, RL = 100 G = +2, RL = 100 G = +2 G = +2 VOUT = 4 V p-p VOUT = 10 V p-p Step, G = +2 f = 1 MHz, RLOAD = 200 f = 10 kHz f = 10 kHz NTSC, G = +2, RLOAD = 150 NTSC, G = +2, RLOAD = 150 15 5 15 5 15 15 15 5, 15 5, 15 15 5 15 5 5, 15 100 80 30 40 180 45 -68 4 2 0.04 0.05 0.03 0.06 7.5 20 5 0.5 1 6 MHz MHz MHz MHz V/s ns dBc nV/Hz pA/Hz % % Degrees Degrees mV mV V/C A A A nA/C V/mV V/mV k pF V V V V dB V p-p V p-p V p-p V p-p mA mA 0.08 0.1 0.1 0.1 15 15 7 15 2 TMIN to TMAX Offset Voltage Drift Input Bias Current TMIN to TMAX Input Offset Current Offset Current Drift Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range VOUT = 7.5 V, RLOAD = 150 TMIN to TMAX 5, 15 5, 15 15 15 3 1 Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing VCM = 5 V Single Ended, RLOAD = 150 TMIN to TMAX Single Ended, RLOAD = 150 TMIN to TMAX RL = 150 15 15 5 5 15 15 15 5 5 15 15 +13 -12 +3.8 -2.7 82 25.2 25.2 6.2 6.0 65 300 1.5 +14.3 -13.4 +4.3 -3.4 110 25.5 6.4 70 105 Output Current Short Circuit Current Specifications subject to change without notice. COMMON CHARACTERISTICS unless otherwise noted) Model MATCHING CHARACTERISTICS Crosstalk: Driver to Driver Drivers to Receivers Receiver to Receiver POWER SUPPLY Operating Range Quiescent Current Driver Supply Rejection Ratio Receiver Supply Rejection Ratio Specifications subject to change without notice. (@ TA = +25 C, VS = 15 V dc, RF = 1 k and RLOAD = 50 (Driver), RLOAD = 500 AD816A Typ Max (Receiver) Conditions VS Min Units f = 1 MHz, VIN = 200 mV rms, RLOAD = 100 15 f = 1 MHz, VIN = 200 mV rms, RLOAD = 100 15 f = 1 MHz, VIN = 200 mV rms, RLOAD = 500 15 5 -67 -64 -81 18 56 59 dB dB dB V mA mA dB dB TMIN to TMAX TMIN to TMAX TMIN to TMAX 15 15 15, 5 15, 5 46 -49 -69 -66 -75 REV. B -3- AD816 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Total Internal Power Dissipation2 Plastic (Y, YS and VR) . . 3.05 W (Observe Derating Curves) Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range Y, YS, VR Package . . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range AD816A . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only. functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 15-Lead Through Hole and Surface Mount: JA = 41C/W. ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD816 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. The AD816 has thermal shutdown protection, which guarantees that the maximum junction temperature of the die remains below a safe level. However, shorting the output to ground or either power supply for an indeterminate period will result in device failure. To ensure proper operation, it is important to observe the derating curves and refer to the section on power considerations. It must also be noted that in high (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. 14 MAXIMUM POWER DISSIPATION - Watts PIN CONFIGURATION Y-15 VR-15, YS-15 13 12 11 10 9 8 7 6 5 4 3 2 1 TJ = 150 C JA = 16 C/W SOLDERED DOWN TO COPPER HEAT SINK AREA (STILL AIR = 0FT/MIN) AD816 AVR, AY TOP VIEW TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 JA = 41 C/W (STILL AIR = 0FT/MIN) NO HEAT SINK AD816 AVR, AY OUT1 RECEIVER -IN1 RECEIVER +IN1 RECEIVER +IN1 DRIVER -IN1 DRIVER OUT1 DRIVER -VS +VS OUT2 DRIVER -IN2 DRIVER +IN2 DRIVER +IN2 RECEIVER -IN2 RECEIVER OUT2 RECEIVER NC OUT1 RECEIVER -IN1 RECEIVER +IN1 RECEIVER +IN1 DRIVER -IN1 DRIVER OUT1 DRIVER -VS +VS OUT2 DRIVER -IN2 DRIVER +IN2 DRIVER +IN2 RECEIVER -IN2 RECEIVER OUT2 RECEIVER NC 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C 70 80 90 Figure 1. Plot of Maximum Power Dissipation vs. Temperature (Copper Heat Sink Area = 2 in.2) ORDERING GUIDE Package Option Y-15 YS-15 VR-15 Model AD816AY AD816AYS AD816AVR Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 15-Lead Through-Hole SIP with Staggered Leads and 90 Lead Form 15-Lead Through-Hole SIP with Staggered Leads and Straight Lead Form 15-Lead Surface Mount DDPAK CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD816 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. B Typical Driver Performance Characteristics-AD816 30 SINGLE-ENDED OUTPUT VOLTAGE - Volts p-p 60 VS = 15V 50 DIFFERENTIAL OUTPUT VOLTAGE - Volts p-p 60 -IB, VS = 50 15V 25 20 40 INPUT BIAS CURRENT - A 40 15 30 30 -IB, VS = 20 5V 10 VS = 5 5V 20 10 10 +IB, VS = 0 -40 -20 0 20 40 60 JUNCTION TEMPERATURE - C 5V, 80 15V 100 0 10 100 LOAD RESISTANCE - (Differential - 1k ) (Single-Ended - 0 10k /2) Figure 2. Driver Output Voltage Swing vs. Load Resistance Figure 5. Driver Input Bias Current vs. Temperature 100 100 -40 TOTAL HARMONIC DISTORTION - dBc -50 -60 -70 -80 -90 -100 -110 100 VOLTAGE NOISE - nV/ Hz INVERTING INPUT CURRENT NOISE CURRENT NOISE - pA/ Hz VS = 15V G = +10 VOUT = 40V p-p 50 100 10 10 RL = 50 (DIFFERENTIAL) 400 NONINVERTING INPUT CURRENT NOISE RL = 200 (DIFFERENTIAL) 1 10 INPUT VOLTAGE NOISE 100 1k FREQUENCY - Hz 10k 1 100k 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 3. Driver Input Current and Voltage Noise vs. Frequency Figure 6. Driver Total Harmonic Distortion vs. Frequency 0 -10 -20 -30 PSRR - dB 80 COMMON-MODE REJECTION - dB VS = 15V G = +2 RL = 100 70 60 50 1k 40 1k 30 20 10 10k VIN 1k 1k VOUT VS = 15V -40 -50 -60 -70 -80 -90 -PSRR +PSRR -100 0.01 0.1 1 10 FREQUENCY - MHz 100 300 100k 1M FREQUENCY - Hz 10M 100M Figure 4. Driver Power Supply Rejection vs. Frequency Figure 7. Driver Common-Mode Rejection vs. Frequency REV. B -5- AD816-Typical Driver Performance Characteristics 1400 -SR SINGLE-ENDED SLEW RATE - V/ s (PER AMPLIFIER) 2800 G = +5 RL = 100 2400 2000 1600 +SR 1200 800 400 0 0 5 10 15 OUTPUT STEP SIZE - V p-p 20 80 TA = +25 C DIFFERENTIAL SLEW RATE - V/ s 1200 1000 800 600 400 200 0 60 VS = 40 RTI OFFSET - mV VS = 20 0 -20 -40 -60 -2.0 -1.6 -1.2 VIN f = 0.1Hz 100 49.9 1k 0 -0.8 -0.4 0.4 0.8 LOAD CURRENT - Amps 1k SINGLE DRIVER VOUT RL= 5 VS = 15V 5V DIFFERENTIAL SR 10V 1.2 1.6 2.0 Figure 8. Driver Slew Rate vs. Output Step Size Figure 11. Driver Thermal Nonlinearity vs. Output Current Drive 15 TA = +25 C 10 VS = 5V VS = 15V VS = 10V DIFFERENTIAL OUTPUT VOLTAGE - V p-p 40 TA = +25 C VS = 15V RL = 100 RTI OFFSET - mV 5 30 RL = 50 20 RL = 25 10 RL = 1 0 0 2 4 10 6 8 FREQUENCY - MHz 12 14 0 VIN f = 0.1Hz 100 49.9 SINGLE DRIVER -5 VOUT RL= 25 -10 1k 1k -15 -20 -16 -12 -8 -4 0 4 VOUT - Volts 8 12 16 20 Figure 9. Driver Gain Nonlinearity vs. Output Voltage Figure 12. Driver Large Signal Frequency Response 100 100 90 CLOSED-LOOP OUTPUT RESISTANCE - 10 VS = 5V 1 VS = 15V 0.1 10 0% 5V 1s 0.01 30k 100k 300k 1M 3M 10M FREQUENCY - Hz 30M 100M 300M Figure 10. Driver 40 V p-p Differential Sine Wave; RL = 50 , f = 100 kHz Figure 13. Driver Closed-Loop Output Resistance vs. Frequency -6- REV. B Typical Driver Characteristics-AD816 DIFF PHASE - Degrees 6 BACK TERMINATED LOADS (25 ) 0.04 0.03 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 DIFF GAIN - % 0 -3 -6 INPUT LEVEL - dBV PHASE -9 -12 -15 -18 -21 -24 -27 100k VIN = 62.5mVrms VIN = 125mVrms VIN = 0.25Vrms -3 -6 -9 -12 -15 -18 -21 300M GAIN 1 2 3 4 5 6 7 8 9 10 11 0.010 0.005 0.000 -0.005 PHASE -0.010 -0.015 GAIN -0.020 -0.025 -0.030 1 2 G = +2 RF = 1k NTSC DIFF PHASE - Degrees 2 BACK TERMINATED LOADS (75 ) DIFF GAIN - % 3 4 5 6 7 8 9 10 11 1M 10M FREQUENCY - Hz 100M Figure 14. Driver Differential Gain and Differential Phase (Per Amplifier) Figure 17. Driver Small and Large Signal Frequency Response, G = +2 0 VIN = 200mVrms -10 -20 CROSSTALK - dB INPUT 100 50 DRIVER A OUTPUT OUTPUT 100 499 499 100 499 499 DRIVER 100 B 2 RF = 499 INPUT 50 1 0 -30 -40 -50 -60 -70 -80 -90 NORMALIZED FLATNESS - dB VIN = 50mVrms G +5 RL = 100 RS = 100 0.1 0 -0.1 RF = 604 RF = 750 -1 -2 -3 -4 -5 DRIVER A = INPUT DRIVER B = OUTPUT RF = 604 RF = 750 DRIVER B = INPUT DRIVER A = OUTPUT -0.2 -0.3 -0.4 100k 1M 10M FREQUENCY - Hz 100M -6 -7 -8 300M -100 10k 100k 1M 10M FREQUENCY - Hz 100M 300M Figure 15. Driver Output-to-Output Crosstalk vs. Frequency Figure 18. Driver Frequency Response and Flatness, G = +5 3 VIN = 1.0Vrms 0 -3 VIN = 0.5Vrms -6 -9 VIN = 0.25Vrms -12 -15 -18 -21 -24 -27 100k VIN = 62.5mVrms VIN = 125mVrms NORMALIZED FREQUENCY RESPONSE - dB OUTPUT/INPUT LEVEL - dBV G = +1 RF = 499 RL = 100 RS = 100 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 100k 1M 10M FREQUENCY - Hz 100M 300M RF = 604 RF = 750 VIN = 200mVrms G +2 RL = 100 RS = 100 RF = 499 1M 10M FREQUENCY - Hz 100M 300M Figure 16. Driver Small and Large Signal Frequency Response, G = +1 Figure 19. Driver Frequency Response vs. RF, G = +2 REV. B -7- NORMALIZED FREQUENCY RESPONSE - dB OUTPUT LEVEL - dBV G = +2 RF = 1k NTSC VIN = 0.5Vrms G = +2 RF = 499 RL = 100 RS = 100 6 3 0 AD816-Typical Driver Performance Characteristics 1k +15V 10 F 0.1 F 1k VIN PULSE GENERATOR TR/TF = 250ps 55 100 499 8 8 499 +15V 10 F 0.1 F AD816 DRIVER A/B 0.1 F 7 AD816 100 DRIVER A/B 7 RL = 100 VIN PULSE GENERATOR TR/TF = 500ps 50 0.1 F 10 F RL = 100 10 F -15V -15V Figure 20. Test Circuit Gain = -1 Figure 24. Driver Test Circuit, Gain = +2 Figure 21. Driver 500 mV Step Response, G = -1 Figure 25. 10 V Step Response, G = +2 Figure 22. Driver 4 V Step Response, G = -1 Figure 26. Driver 400 mV Step Response, G = +2 RF +15V 10 F 0.1 F RG 8 AD816 VIN PULSE GENERATOR TR/TF = 250ps 100 50 -15V DRIVER A/B 0.1 F 7 RL = 100 10 F Figure 23. Test Circuit, Gain = 1 + RF/RG Figure 27. Driver 20 V Step Response, G = +5 -8- REV. B Typical Receiver Performance Characteristics-AD816 50 -40 G = +5 VOUT = 14V p-p RF = 4k RL = 1k INPUT VOLTAGE NOISE - nV/ Hz 40 HARMONIC DISTORTION - dB -50 -60 30 -70 20 -80 10 -90 0 3 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M -100 100 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 28. Receiver Input Voltage Noise Spectral Density Figure 31. Receiver Harmonic Distortion vs. Frequency 5 4 3 2 VIN 1k 1k VOUT 50 3 VIN = 1.0Vrms 0 -3 VIN = 0.5Vrms INPUT LEVEL - dBV VS = 15V 9 G = +2 RF = 1k CF = 2.2pF RL = 100 RS = 0 6 OUTPUT LEVEL (RTO) - dBV 3 0 -3 100 -6 -9 -12 -15 VIN = 0.125Vrms -18 -21 VIN = 0.0625Vrms -24 -27 100k 1M 10M FREQUENCY - Hz VIN = 0.25Vrms GAIN - dB 1 0 -1 -2 -3 -4 -5 100k 1M 10M FREQUENCY - Hz 100M 300M VS = 5V -6 -9 -12 -15 -18 100M -21 300M Figure 29. Receiver Closed-Loop Gain vs. Frequency, Gain = -1 Figure 32. Receiver Small and Large Signal Frequency Response, Gain = +2 100 100 90 80 80 70 CMR - dB PSR - dB 60 50 40 30 NEGATIVE SUPPLY 60 1k VIN 40 1k 1k 1k VOUT POSITIVE SUPPLY 20 0 1k 10k 100k FREQUENCY - Hz 1M 10M 10 100 1k 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 30. Receiver Common-Mode Rejection vs. Frequency Figure 33. Receiver Power Supply Rejection vs. Frequency REV. B -9- AD816-Typical Receiver Performance Characteristics 2.2pF 1k +15V 0.1 F 1k 8 1k +15V 0.1 F 1k VIN VOUT 8 10 F 10 F AD816 REC A/B VIN PULSE GENERATOR TR/ TF = 500ps 50 -15V 7 PULSE GENERATOR TR/ TF = 250ps 50 AD816 REC A/B 7 VOUT 0.1 F 10 F RL = 500 0.1 F 10 F RL -15V Figure 34. Test Circuit, Gain = +2 Figure 38. Test Circuit, Gain = -1 50ns 5V Figure 35. Receiver 10 V Step Response, G = +2 Figure 39. Receiver 10 V Step Response, G = -1 50ns Figure 36. Receiver 400 mV Step Response, G = +2 Figure 40. Receiver 400 mV Step Response, G = -1 0 -10 -20 CROSSTALK - dB 0 VIN = 200mVrms INPUT 50 REC A OUTPUT OUTPUT REC B 50 INPUT INPUT 100 DRV A REC A OUTPUT OUTPUT 100 100 1k INPUT 50 VIN = 200mVrms -10 -20 -30 CROSSTALK - dB 50 499 499 -30 -40 -50 -60 -70 -80 -90 1k 2.2pF 2.2pF 499 499 OUTPUT OUTPUT 100 100 1k 1k 1k 100 100 1k 1k 1k -40 -50 -60 -70 -80 INPUT 100 INPUT 50 2.2pF 2.2pF DRV B REC B 50 RECEIVER B : INPUT RECEIVER A : OUTPUT DRIVER A: INPUT RECEIVER A: OUTPUT DRIVER A: INPUT RECEIVER B: OUTPUT DRIVER B: INPUT RECEIVER A: OUTPUT RECEIVER A = INPUT RECEIVER B = OUTPUT 0.1 1 10 FREQUENCY - MHz 100 300 -90 -100 0.01 DRIVER B: INPUT RECEIVER A: OUTPUT -100 0.01 0.1 1 10 FREQUENCY - MHz 100 300 Figure 37. Receiver Output-to-Output Crosstalk vs. Frequency Figure 41. Driver-to-Receiver Crosstalk vs. Frequency -10- REV. B AD816 THEORY OF OPERATION (DRIVER) Table I. Driver Resistor Values The AD816 driver is a dual current feedback amplifier with high (500 mA) output current capability. Being a current feedback amplifier, the AD816 driver's open-loop behavior is expressed as transimpedance, VO/I-IN, or TZ. The open-loop transimpedance behaves just as the open-loop voltage gain of a voltage feedback amplifier, that is, it has a large dc value and decreases at roughly 6 dB/octave in frequency. Since RIN is proportional to 1/gM, the equivalent voltage gain is just TZ x gM, where the gM in question is the transconductance of the input stage. Figure 42 shows the driver connected as a follower with gain. Basic analysis yields the following results: T Z (S ) VO =Gx VIN T Z (S ) + G x RIN + RF RF ( ) G = +1 -1 +2 +5 +10 604 499 499 499 1k RG ( ) 499 499 125 110 DRIVER DC ERRORS AND NOISE where: G = 1+ RF RG RIN = 1/gM 25 RF RG RIN RN VIN VOUT There are three major noise and offset terms to consider in a current feedback amplifier. For offset errors refer to the equation below. For noise error the terms are root-sum-squared to give a net output error. In the circuit below (Figure 43), they are input offset (VIO) which appears at the output multiplied by the noise gain of the circuit (1 + RF/RG), noninverting input current (IBN x RN) also multiplied by the noise gain, and the inverting input current, which when divided between RF and RG and subsequently multiplied by the noise gain always appear at the output as IBI x RF. The input voltage noise of the AD816 is less than 4 nV/Hz. At low gains, however, the inverting input current noise times RF is the dominant noise source. Careful layout and device matching contribute to better offset and drift. The typical performance curves in conjunction with the equations below can be used to predict the performance of the AD816 in any application. R R VOUT =VIO 1+ F I BN RN 1+ F I BI RF RG RG RF RG VIO I BI Figure 42. Current-Feedback Amplifier Operation Recognizing that G x RIN << RF for low gains, it can be seen to the first order that bandwidth for this amplifier is independent of gain (G). Considering that additional poles contribute excess phase at high frequencies, there is a minimum feedback resistance below which peaking or oscillation may result. This fact is used to determine the optimum feedback resistance, RF. In practice parasitic capacitance at the inverting input terminal will also add phase in the feedback loop so that picking an optimum value for RF can be difficult. Achieving and maintaining gain flatness of better than 0.1 dB at frequencies above 10 MHz requires careful consideration of several issues. Choice of Feedback and Gain Resistors RN I BN AD816 DRIVERS VOUT Figure 43. Driver Output Offset Voltage THEORY OF OPERATION (RECEIVER) Each AD816 receiver is a wide band high performance operational amplifier. It also provides a constant slew rate, bandwidth and settling time over its entire specified temperature range. The AD816 receiver consists of a degenerated NPN differential pair driving matched PNPs in a folded-cascode gain stage. The output buffer stage employs emitter followers in a class AB amplifier which deliver the necessary current to the load while maintaining low levels of distortion. A protection resistor in series with the noninverting input is required in circuits where the input to the receiver could be subject to transients on continuous overload voltages exceeding the 6 V maximum differential limit. The resistor provides protection for the input transistors, by limiting their maximum base current. The fine scale gain flatness will, to some extent, vary with feedback resistance. It is therefore recommended that once optimum resistor values have been determined, 1% tolerance values should be used if it is desired to maintain flatness over a wide range of production lots. Table I shows optimum values for several useful gain configurations. These should be used as a starting point in any application. REV. B -11- AD816 PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS relationship between junction temperature (TJ) and various components of JA. TJ = TA + PIN JA A (JUNCTION TO DIE MOUNT) As to be expected for a wideband amplifier, PC board parasitics can affect the overall closed-loop performance. Of concern are stray capacitances at the output and the inverting input nodes. If a ground plane is to be used on the same side of the board as the signal traces, a space (5 mm min) should be left around the signal lines to minimize coupling. POWER SUPPLY BYPASSING Equation 1 TJ B (DIE MOUNT TA CASE TJ PIN TO CASE) Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier's response. In addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than 1 F) will be required to provide the best settling time and lowest distortion. A parallel combination of 10.0 F and 0.1 F is recommended. Under some low frequency applications, a bypass capacitance of greater than 10 F may be necessary. Due to the large load currents delivered by the AD816, special consideration must be given to careful bypassing. The ground returns on both supply bypass capacitors as well as signal common must be "star" connected as shown in Figure 44. +VS +IN DRIVER A RF RG (OPTIONAL) RF -OUT DRIVER B IN -IN -VS RECEIVER B OUT +OUT OUT RF RF RG RG RECEIVER A IN A + B = JC CA JA TA JC WHERE: PIN = DEVICE POWER DISSIPATION TA = AMBIENT TEMPERATURE TJ = JUNCTION TEMPERATURE JC = THERMAL RESISTANCE - JUNCTION TO CASE CA = THERMAL RESISTANCE - CASE TO AMBIENT Figure 45. A Breakdown of Various Package Thermal Resistances Figure 46 gives the relationship between output voltage swing into various loads and the power dissipated by the AD816 (PIN). This data is given for both sine wave and square wave (worst case) conditions. It should be noted that these graphs are for mostly resistive (phase < 10) loads. When the power dissipation requirements are known, Equation 1 and the graph on Figure 47 can be used to choose an appropriate heat sinking configuration. f = 1kHz VS = 15V SQUARE WAVE SINE WAVE PIN - Watts 3 RL = 100 2 RL = 200 1 RL = 50 4 Figure 44. Signal Ground Connected in "Star" Configuration POWER CONSIDERATIONS The 500 mA drive capability of the AD816 driver enables it to drive a 50 load at 40 V p-p when it is configured as a differential driver. This implies a power dissipation, PIN, of nearly 5 watts. To ensure reliability, the junction temperature of the AD816 should be maintained at less than 175C. For this reason, the AD816 will require some form of heat sinking in most applications. The thermal diagram of Figure 45 gives the basic 10 20 30 VOUT - Volts p-p 40 Figure 46. Total Power Dissipation vs Differential Driver Output Voltage -12- REV. B AD816 Normally, the AD816 will be soldered directly to a copper pad. Figure 47 plots JA against size of copper pad. This data pertains to copper pads on both sides of G10 epoxy glass board connected together with a grid of feedthroughs on 5 mm centers. This data shows that loads of 100 ohms or greater will usually not require any more than this. This is a feature of the AD816's 15-lead power SIP package. An important component of JA is the thermal resistance of the package to heatsink. The data given is for a direct soldered connection of package to copper pad. The use of heatsink grease either with or without an insulating washer will increase this number. Several options now exist for dry thermal connections. These are available from Bergquist as part # SP600-90. Consult with the manufacturer of these products for details of their application. COPPER HEAT SINK AREA (TOP AND BOTTOM) - in2 1 2 3 35 The AD816 is equipped with a thermal shutdown circuit. This circuit ensures that the temperature of the AD816 die remains below a safe level. In normal operation, the circuit shuts down the AD816 at approximately 180C and allows the circuit to turn back on at approximately 140C. This built-in hysteresis means that a sustained thermal overload will cycle between power-on and power-off conditions. The thermal cycling typically occurs at a rate of 1 ms to several seconds, depending on the power dissipation and the thermal time constants of the package and heat sinking. Figures 48 and 49 illustrate the thermal shutdown operation after driving OUT1 to the + rail, and OUT2 to the - rail, and then short-circuiting to ground each output of the AD816. The AD816 will not be damaged by momentary operation in this state, but the overload condition should be removed. 30 AD816AVR, AY (JC = 2 C/W) JA - C/W 25 20 15 Figure 48. OUT2 Shorted to Ground Through a 2 Resistor, Square Wave Is OUT1, RF = 1 k, RG = 222 0 0.5k 1k 1.5k 2k 2.5k 10 COPPER HEAT SINK AREA (TOP AND BOTTOM) - mm2 Figure 47. Power Package Thermal Resistance vs. Heat Sink Area Other Power Considerations There are additional power considerations applicable to the AD816. First, as with many current feedback amplifiers, there is an increase in supply current when delivering a large peak-to-peak voltage to a resistive load at high frequencies. This behavior is affected by the load present at the amplifier's output. Figure 12 summarizes the full power response capabilities of the AD816 driver. These curves apply to the differential driver applications (right-hand side of Figure 52). In Figure 12, maximum continuous peak-to-peak output voltage is plotted vs. frequency for various resistive loads. Exceeding this value on a continuous basis can damage the AD816. Figure 49. OUT1 Shorted to Ground Through a 2 Resistor, Square Wave Is OUT2, RF = 1 k, RG = 222 REV. B -13- AD816 APPLICATIONS ADSL Transceiver The AD816 is designed for the primary purpose of providing an integrated solution for the transmit and receive functions of an ADSL modem. ADSL or Asymmetrical Digital Subscriber Line is a means for delivering up to 6 Mbps from a telephone central office (CO) into a home over the conventional telephone twisted pair (local loop) and a few hundred kbps simultaneously in the opposite direction. The transmit/receive block is commonly referred to as a hybrid, which is an old telephone term, and the function was originally performed with passive circuitry in early phone systems. The hybrid's function is to deliver maximum transmit power down the line, while providing the receive circuitry with a maximum receive signal and a minimized (self) transmit signal. As the line gets longer, this separation becomes much more difficult, because the transmit signal must be larger to reach the other end with acceptable SNR, while the receive signal is more attenuated by the longer line. The figure of merit for the performance of the hybrid is commonly called trans-hybrid loss and is a measure of how much the transmit signal that appears in the receive circuit has been attenuated relative to the amplitude of the transmit signal itself. It is measured in dBs and is a function of frequency. +15V In addition to the passive circuits that have been used over time, active circuit techniques can enhance the hybrid's performance. Figure 50 shows one of the various hybrid circuits that uses the AD816 in an ADSL application. The high power op amps serve as the transmitter, while the low noise amplifiers serve as the receiver. The power amplifiers of the AD816 (D1 and D2) are arranged in a differential configuration that receives its inputs from the differential outputs of a D/A converter. The outputs differentially drive the transformer primary with a turns ratio of 1:2. The line on the secondary side of the transformer has an impedance of 120 . Thus one quarter of this resistance (30 ) is required for back termination on the primary side due to the impedance scaling by the square of the turns ratio. This resistance is divided in half (15 ) and put on each side of the drive buffers for symmetry (R101 and R201). The receive section (R1 and R2) is configured as a pair of difference amplifiers that together produce a differential output that consists of the receive signal in addition to the transmit signal attenuated by the trans-hybrid loss. The circuit is highly symmetrical, so a single-ended explanation can be easily generalized to understand the differential operation. D1 output terminals (Pin 6 of the AD816) drives the top of the primary of T1 through R101. A voltage divider is formed 0.1 F V+ 4 5 8 6 10 F R101 15 1 T1 XFRMR 2 4 7 C601 0.1 F D1 715 TELEPHONE 806 715 R201 15 R202 196 10 F R203 196 C101 8.2 F R103 196 R104 1.18k R102 196 R105 162 5 10 11 D2 7 9 10 9 8 6 C602 0.1 F TWISTED PAIR V- AD816 0.1 F R106 348 3 2 R107 1k R206 348 R205 162 12 13 AD816 R207 1k R208 2.37k 14 R108 2.37k -15V AD816 1 RCV OUT+ R1 C201 8.2 F R204 1.18k L201 12 H L101 12 H RCV OUT- R2 Figure 50. AD816 as an ADSL Transceiver -14- REV. B AD816 by R101 and all the downstream circuitry comprised of T1, the transmission line and its termination. For an ideal transformer, transmission line and termination, this will appear to be 15 , and thus the signal appearing at Pins 1 and 2 of T1 will be the output of D1 divided by two in the ideal case. This signal is applied to the input of R1 (Receive 1 of the AD816) (Pin 3) via R105. In some ADSL systems (DMT), there is a need to transmit higher crest factor signals. Typically this is done by increasing the turns ratio of T1 to as much as 4:1. In this case, R101 and R201 would be 3.75 , and the peak current of the AD816 (1 A) would be the drive limit of the transmitter. R1 is configured as a difference amplifier. The negative side (Pin 2) is driven by another signal that is a divided down version of the output of D1. This circuit is formed by R102 as one side of the voltage divider along with R103, C101, R104 and L101 as the other half of the divider. If the frequency dependent impedance part of this circuit matches the transformer, transmission line and termination impedance, then the signals applied to both sides of the difference-amp-configured R1 will be the same, and the transmit signal will be totally subtracted out by the circuit. In a real-world situation, it is not practical (or even possible) to subtract out all of the transmit signal (100% trans-hybrid loss), but only provide a first order cancellation which goes a long way toward reducing the dynamic range of the RCVOUT signal. The overall performance of this circuit depends on the ability to build a lumped element network that matches the impedance of the transmission line over the frequency range required for ADSL ( 20 kHz to 1.1 MHz). The circuits formed by D2 and R2 of the AD816 are totally symmetric with those formed by D1 and R1 and work in the same fashion. All the components in the D1, R1 circuits that are numbered with 100 range numbers are numbered with 200 range numbers in the D2, R2 circuits. The receive signal from the telephone line creates a differential signal across the primary of T1. There is, however, a two to one reduction in amplitude due to turns ratio of T1. This differential signal is applied to the + inputs (Pins 3 and 12) of R1 and R2. The receive amplifiers buffer this signal and present a differential output at Pins 1 and 14. There is no significant receive signal applied to the negative inputs of R1 and R2 due to the attenuating effects of R101 and R201 and the low output impedances of D1 and D2. Thus, the overall circuit provides first order cancellation of the transmit signal and differential buffering of the receive signal. Dual Composite Amplifier A composite amplifier uses two different op amps together in a circuit to yield an overall performance that has some of the advantages of each op amp. In the case of the AD816, two composite amplifiers can be constructed that offer the low noise of the receiver amps in addition to the high current output of the driver amps. The circuit in Figure 51 shows an example of such a circuit. It uses receiver amp R1 for the low noise first stage and driver D1 for the high output current second stage. Both local and overall feedback are used to get the desired response. 2 R1 VIN 3 4 D1 5 6 VOUT Figure 51. AD816 Composite Amplifier Creating Differential Signals If only a single-ended signal is available to drive the AD816 and a differential output signal is desired, a circuit can be used to perform the single-ended to differential conversion. The circuit shown in Figure 52 performs this function. It uses the AD816 with the gain of one receiver set at +1 and the gain of the other at -1. The 1 k resistor across the input terminals of the follower makes the noise gain (NG = 2) equal to the inverter's. The two receiver outputs then differentially drive the inputs to the AD816 driver with no common-mode signal to first order. +15V +15V RECEIVER #1 3 8 0.1 F 100 4 8 0.1 F 10 F 1k AD816 2 1 DRIVER #1 AD816 5 6 1k RG 100 1k 6 RF 499 RL RF 499 9 1k 10 7 RECEIVER #2 AD816 5 4 DRIVER #2 100 AD816 11 7 0.1 F -15V -15V 0.1 F 10 F Figure 52. Differential Driver with Single-Ended Differential Converter REV. B -15- AD816 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 15-Lead Surface Mount DDPAK (VR-15) 0.110 (2.79) 0.152 (3.86) BSC 0.148 (3.76) 0.063 (1.60) 0.057 (1.45) 0.137 (3.479) 0.516 TYP (13.106) 0.042 (1.066) TYP 0.080 (2.03) 0.065 (1.65) 2 PLACES 0.079 (2.006) DIA 2 PLACES 15-Lead Through-Hole SIP with Staggered Leads and 90 Lead Form (Y-15) 0.110 (2.79) BSC 0.152 (3.86) 0.148 (3.76) 0.063 (1.60) 0.057 (1.45) 0.137 (3.479) TYP 0.042 (1.066) TYP 0.394 (10.007) 0.394 (10.007) 0.516 (13.106) 0.694 (17.63) 0.684 (17.37) 0.426 (10.82) 0.416 (10.57) 0.426 (10.82) 0.416 (10.57) 1 15 0.146 (3.70) 0.138 (3.50) PIN 1 0.600 (15.24) BSC 0.798 (20.27) 0.778 (19.76) 8 0 0.024 (0.61) 0.014 (0.36) PIN 1 1 15 0.182 (4.62) 0.172 (4.37) 0.100 (2.54) BSC 0.031 (0.79) SEATING 0.024 (0.60) PLANE 0.798 (20.27) 0.778 (19.76) 0.671 0.006 (17.043 0.152) SHORT 0.080 (2.03) LEAD 0.065 (1.65) 2 PLACES 0.079 (2.006) DIA 2 PLACES 0.182 (4.62) 0.172 (4.37) 0.666 0.006 (16.916 0.152) LONG LEAD 0.024 (0.61) 0.014 (0.36) SEATING PLANE 0.050 0.031 (0.79) (1.27) 0.024 (0.60) BSC 0.700 (17.78) BSC 0.209 0.010 (5.308 0.254) 15-Lead Through-Hole SIP with Staggered Leads and Straight Lead Form (YS-15) 0.110 0.152 (3.86) (2.79) BSC 0.148 (3.76) 0.394 (10.007) 0.516 (13.106) 0.063 (1.60) 0.057 (1.45) 0.137 (3.48) TYP 0.042 (1.07) TYP 0.694 (17.63) 0.684 (17.37) 0.426 (10.82) 0.416 (10.57) 1 15 0.080 (2.03) 0.065 (1.65) 2 PLACES 0.079 (2.007) DIA 2 PLACES 0.627 0.010 (15.926 0.254) SHORT LEAD 0.601 0.010 (15.265 0.710 (18.03) 0.254) 0.690 (17.53) LONG LEAD 0.176 (4.47) 0.150 (3.81) PIN 1 0.700 (17.78) BSC 0.798 (20.27) 0.778 (19.76) 0.024 (0.61) 0.014 (0.36) 0.169 0.200 (4.29) (5.08) BSC BSC 0.691 0.010 (17.551 0.254) 0.766 0.010 (19.456 0.254) 0.791 0.010 (20.091 0.254) 0.088 (2.24) 0.068 (1.72) 0.182 (4.62) 0.172 (4.37) SEATING PLANE 0.050 (1.27) BSC 0.031 (0.79) 0.024 (0.60) -16- REV. B PRINTED IN U.S.A. C2191b-0-12/99 (rev. B) 0.694 (17.63) 0.684 (17.37) |
Price & Availability of AD816AVR
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